The RTL8181 is a highly integrated System-on-a-Chip with a high-performance 32-bit RISC microcontroller, two Ethernet MACs, and a WLAN controller embedded onto a single chip with a space-saving total package size of 17mm x 17mm. It is a cost-effective solution for wireless LAN access points, wireless SOHO routers, wireless Internet gateways, etc.

The embedded Lexra LX5280 32-bit RISC CPU runs at up to 200MHz and features separate 8KB instruction and data caches. The processor pipeline is a dual-issue 6-stage architecture; the CPU fetches two instructions per cycle, allowing two instructions to be executed concurrently in two pipes and giving a 30% performance improvement over uni-scalar architecture.

The RTL8181 includes two Fast Ethernet MACs, one perhaps used for a LAN interface and the other connected to a WAN port. An embedded IEEE 802.11b WLAN MAC and Baseband controller saves BOM costs and allows a very small footprint compared to systems requiring an external 802.11b adapter. For extra design flexibility, a PCI interface is also supported. An IEEE 802.11a device could be connected through this PCI interface to provide WLAN dual mode service.

As required by modern operating systems, a Memory Management Unit (MMU) allows the memory to be segmented and protected. The integrated memory controller permits the use of glueless interfaces to external SDRAM and Flash memory.

• Core Processor
  • LX5280 32-bit RISC architecture
  • Superscalar architecture, containing 2 execution pipelines for high performance
  • Embedded 8KB I-Cache, 8KB D-Cache and 4KB DRAM
  • MMU support
  • Up to 200MHz operating frequency
  
  
• WLAN Controller
  • Integrated IEEE 802.11b compliant MAC and DSSS Baseband processor
  • Supports 1, 2, 5.5, or 11Mbps data rates
  • Supports long and short preamble
  • Supports antenna diversity and AGC
  • Universal chip for various radio front ends
  • Embedded with encryption/decryption engine for 64 and 128-bit WEP
  
  
• Fast Ethernet Controller
  • Fully compliant with IEEE 802.3/802.3u
  • Supports MII interface with full and half duplex capability
  • Supports descriptor-based buffer management with scatter-gather capability
  • Supports IP, TCP, and UDP checksum offload
  • Supports IEEE 802.1Q VLAN tagging and 802.1P priority queue
  • Supports full-duplex flow control (IEEE 802.3X)
  
  
• PCI Bridge
  • Complies with PCI 2.2
  • Supports one external PCI device
  • Supports PCI master/slave mode
  
  
• Memory Controller
  • Supports external 16/32-bit SDRAM with 2 banks access, up to 32M bytes
  • Supports external 16-bit Flash memory, up to 4M bytes
  
  
• UART
  • 16550 compatible
  • 16-byte FIFO buffer
  • Auto CTS/RTS flow control
  
  
• GPIO
  • 20 programmable I/O ports
  • Individually configurable input, output, and edge transition lines

• Wireless LAN access points
• Wireless SOHO routers
• Wireless Internet gateways