The RTL8376-GR is a 128-pin, low-power, high-performance 16-port Gigabit Ethernet switch, with integrated 8-port Giga-PHY that supports 1000Base-T, 100Base-T, and 10Base-T. The 9~16th port’s MACs implement dual RSGMII-Plus interfaces for connecting with an external PHY (e.g., RTL8218) in 16-port switch applications. The RTL8376-GR integrates all the functions of a high-speed switch system; including SRAM for packet buffering, non-blocking switch fabric, and internal register management into a single CMOS mixed mode device. Only a 25MHz crystal is required; an optional EEPROM is offered for internal register configuration.
The embedded packet storage SRAM in the RTL8376 features superior memory management technology to efficiently utilize memory space. The RTL8376 integrates an 8K-entry look-up table with a 4-way XOR Hashing algorithm for address searching and learning. The table provides read/write access from the EEPROM Serial Management Interface (SMI), and each of the entries can be configured as a static entry. The entry aging time is between 200 and 400 seconds. Eight Filtering Databases are used to provide Independent VLAN Learning and Shared VLAN Learning (IVL/SVL) functions.
The RTL8376 supports standard 802.3x flow control frames for full duplex and optional backpressure for half duplex. It determines when to invoke the flow control mechanism by checking the availability of system resources, including the packet buffers and transmitting queues. The RTL8376 supports broadcast/multicast output dropping, and will forward broadcast/multicast packets to non-blocked ports only.
In order to support flexible traffic classification, the RTL8376 supports 32-entry ACL rule check and multiple actions options. Each port can optionally enable or disable the ACL rule check function. The ACL rule key can be based on packet physical port, Layer2, Layer3, and Layer4 information. When an ACL rule matches, the action taken is configurable to Drop/Permit/Redirect/Mirror, change priority value in 802.1q/Q tag, and rate policing. The rate policing mechanism supports from 64Kbps to 1Gbps (in 64Kbps steps)
To improve real-time or multimedia networking applications, the RTL8376 supports eight priority assignments for each received packet. These are based on (1) Port-based priority; (2) 802.1p/Q VLAN tag priority; (3) DSCP field in IPv4/IPv6 header; and (4) ACL-assigned priority. Each output port supports a weighted ratio of eight priority queues to fit bandwidth requirements in different applications. The input bandwidth control function helps limit per-port traffic utilization. There are 2 leaky buckets for each queue of all ports, one for Average packet rate control and the other for Peak packet rate control. Queue scheduling algorithm can use Strict Priority (SP) or Weighted Fair Queue (WFQ) or mixed.
The RTL8376 provides a 4K-entry VLAN table for 802.1Q port-based, tag-based, and protocol-based VLAN operation to separate logical connectivity from physical connectivity. The RTL8376 supports four Protocol-based VLAN configurations that can optionally select EtherType, LLC, and RFC1042 as the search key. Each port may be set to any topology via EEPROM upon reset, or EEPROM SMI Slave after reset. The RTL8376 also provides an option to meet special VLAN application requirements. The option is the Leaky VLAN function, which sends unicast frames to other VLANs, or only forwards unicast frames to the originating VLAN. The VLAN tags can be inserted or removed on a per-port basis.
- 16-port gigabit non-blocking switch architecture
- Embedded 8-port 10/100/1000Base-T PHY
- Integrates 2 pairs of 5GHz high-speed serial links (Reduced Serial Gigabit Media Independent Interface-RSGMII-Plus)
- Each port supports full duplex 10/100/1000M connectivity (half duplex only supported in 10/100M mode)
- Supports pre-IEEE 802.3az Energy Efficient Ethernet.
- Full-duplex and half-duplex operation with IEEE 802.3x flow control and backpressure
- Integrated SRAM for packet buffer
- Supports packet length 9216 bytes jumbo frame packet forwarding at wire speed
- Supports Realtek Cable Test (RTCT) function
- Supports ACL Rules
- Search keys support physical port, Layer2, Layer3, and Layer4 information
- Actions support dropping, priority adjustment, and traffic rate policing
- Optional setting of per-port action to take when ACL mismatch
- 802.1Q VLAN supports for 4096 entries
- Supports Port-based, Tag-based, and Protocol-based VLAN
- Supports per-port and per-VLAN egress VLAN tagging and un-tagging
- Supports IVL/SVL
- Supports Quality of Service (QoS)
- Input Bandwidth Control from 8Kbps to 1Gbps (in 8Kbps steps)
- Traffic classification based on IEEE 802.1Q priority definition, physical Port, ACL definition, VLAN based priority
- Scheduling supports Strict Priority (SP) and Weighted Fair Queuing (WFQ)
- Supports per queue flow control
- Min-Max Scheduling
- Security Filtering
- Disable learning for each port
- Drop unknown DA for each port
- Broadcast/Multicast/Unknown DA storm control protects system from attack by hackers
- Supports Realtek Green Ethernet features
- Link-On Cable Length Power Saving
- Link-Down Power Saving
- Each port supports 3 LED outputs via serial MDIO interface
- Supports EEPROM SMI Slave interface to access configuration register
- Supports EEPROM for configuration
- 25MHz crystal or 3.3V OSC input
- Low Power consumption
- LQFP 128-pin E-PAD package